Open Bug 1077317 Opened 10 years ago Updated 2 years ago

ARM: Generate better code for atomics when operands are small immediates

Categories

(Core :: JavaScript Engine: JIT, defect, P5)

ARM
All
defect

Tracking

()

People

(Reporter: lth, Unassigned)

References

(Blocks 1 open bug)

Details

Followup work to bug 979594. We can generate better code / lower register pressure by embedding small immediates in the instructions rather than forcing them into register, as we do now. Known cases: - When the value operand to the atomic binary operations is a small immediate - When the oldval operand to the atomic compareExchange operation is a small immediate.
Memo to self: I have incomplete patches for this but it's a fair amount of churn up the entire stack for little gain (and the register pressure argument is dubious because a new temp is needed elsewhere); deprioritize for now.
Assignee: nobody → lhansen
Priority: -- → P5
Assignee: lhansen → nobody
Blocks: 1317626
No longer blocks: shared-array-buffer
Severity: normal → S3
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