The Simulator should be able to emulate atomics well enough to actually run multithreaded code that requires proper mutual exclusion. Certainly we can do so if we assume sympathetic hosting hardware. Right now, the simulator simulates the behavior of the hardware with a local and global monitor, but does not perform proper mutual exclusion. See bug 1211409 for the ARM32 case and a patch that implements the simulation on x86 hardware.

This should be done by updating our VIXL version. More recent versions include atomics support and exclusive-access operations in the Simulator.

Bug 1219050 landed the VIXL 1.10 update. The now-current VIXL simulates the ARM monitor, and it does perform actual hardware barriers to implement ordering for the new acquire/release instructions, but there is no explicit mutual exclusion on read and write, and the interaction of the monitor with the loads and stores is insufficient to ensure atomicity even on friendly hardware like x64. I think more work is needed here before we can run multi-threaded programs on the simulator. The VIXL README is a little vague on this, but what it does say amounts to much the same thing: it provides good simulation of single-threaded behavior for the atomic instructions. (https://github.com/armvixl/vixl/blob/master/README.md.)

Something like this, not very invasive. Hard to test until we have jit support mostly working, but this is probably complete enough for us.

I think VIXL has been updated again so we should look into that. Also see bug 1435968.

Apparently the JIT-tests and JS-tests run without this fix.