Baseline Interpreter: keep bytecode pc in a register between VM/IC calls
Categories
(Core :: JavaScript Engine: JIT, task, P1)
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Tracking | Status | |
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firefox69 | --- | fixed |
People
(Reporter: jandem, Assigned: jandem)
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(2 files)
The current design where the bytecode pc is stored in the frame but can also be in a register at the start of an op (until R2 is used) is not as simple and performant as I'd like.
Having a dedicated bytecode PC register (that's saved and restored around VM/IC calls) lets us simplify the code and it's significantly faster on x64, about 9-10%.
The main issue is that on 32-bit x86 we don't have enough registers to do this nicely without complicating the code, so there we won't have a PC register and we'll continue to always store it in the frame. That's a 2-3% perf regression compared to the current scheme, but I think it's an acceptable trade-off considering ongoing migration to x64 and code simplification.
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Comment 1•5 years ago
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This is both simpler and faster than the old scheme where the pc was stored in
a register but could be clobbered by R2.
On x64 this wins about 9-10%. On 32-bit x86 we don't have enough registers so
there we load the pc from the frame in more cases. That's about a 2-3%
regression and is a reasonable trade-off.
Updated•5 years ago
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Comment 3•5 years ago
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bugherder |
Updated•5 years ago
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Comment 6•5 years ago
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bugherder |
Description
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