Open
Bug 679891
Opened 13 years ago
Updated 2 years ago
IonMonkey: register allocation optimizations for ARM
Categories
(Core :: JavaScript Engine, defect)
Tracking
()
NEW
People
(Reporter: mjrosenb, Unassigned)
References
Details
(Whiteboard: [ion:t])
Similar to: 588033
There are many cases where it would be useful to allocate several values to consecutive registers, or ascending registers. In addition to the LDRD and STRD, there are instructions: LDM and STM which will move a subset of registers to consecutive memory locations, such as
stm sp, {r0,r1,r4,r5,r7,lr}
which will store 5 registers and the link register onto the stack in (If the stack was 64-bit aligned) 3 or 4 cycles
Updated•12 years ago
|
Whiteboard: [ion:t]
Assignee | ||
Updated•10 years ago
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Assignee: general → nobody
Updated•10 years ago
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Summary: IonMonkey: lsra optimizations for ARM → IonMonkey: register allocation optimizations for ARM
Updated•2 years ago
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Severity: normal → S3
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Description
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