Richards is ~2000 points slower with ggc enabled. There is no GC or store buffer activity in the test so the difference is entirely in the performance of the post-barrier. The attached patch is a fairly simple change to switch from asm like |cmp,jmp,cmp,jmp| to |move,add,cmp,jmp| by combining two comparisons into one with an overflowing add. The code is about the same size but presumably puts less pressure on the branch machinery. With this patch, Richards is 1.5% faster on x64 and should reflect an across-the-board improvement to baseline GGC perf. This only gets us 150 points back of the 2000 we want, but is a simple enough change to take regardless. The code is currently using the scratch register, so still needs to be split up by platform and integrated with regalloc.

Since the wip0 patch requires a ScratchReg, we need to split the barrier code up by architecture. This is unfortunate, but the post barrier code does fit right in with the other platform specialized bits: pervasive instructions that must be hyper-optimal because they are used everywhere. With the wip0 patch rebased on top of this for x64, I get a 3% speedup on richards. I still have some more work to do cleaning that up and making it work on the other platforms.